Job location: San Jose CA
Developing, enhancing and maintaining the high performance Place & Route Flow using the industry standard EDA tools
Drive methodologies that will enable successful integration of place and route blocks into our full chip.
Work closely with RTL design team in taking their blocks (coded in Verilog) through Place & Route Flow (macro cell floor planning, placement, routing etc.) and generating backend views that meet area and timing requirements.
Work on block level physical verification tasks using a combination of in-house and industry standard tools.
Writing scripts in TCL and Perl to achieve higher performance designs and productivity enhancements through automation.
BSEE or MS with 7-10 years of physical CAD experience.
Physical design knowledge, from netlist handoff to GDS tape out including floor planning, place and route, clock tree synthesis, timing closure and physical verification
Experience with one or more of the industry standard Place and Route tool is a must.
Knowledge of scripting languages such as Perl/TCL is required.
Good understanding of high speed digital design is a plus.
Diligent, detail-oriented, and handle assignments with minimal supervision.
Must possess good communication skills, self-driven individual and a good team player.
Your responsibilities will include the following:
Own the technical response to Product RFQs and RFIs
Prepare and present technical demos and trainings when ncessary.
Troubleshoot, diagnose, and resolve complex customer incidents in a timely manner.
Review and assist in the debugging of customer and partner OS, bootloader, and application code
Installation, test, and benchmarking of Cavium reference software and software development kits, configuration and use of application software including IPSec/IKE, SSL, 7-layer network stacks
Guidance and assistance in development of customer hardware, test software, device drivers, API's, and application software.
Participate in conference calls with Customers and Sales/FAEs
Interface with other Cisco FAE Team members, engineering and product management to escalate and resolve issues.
Replicate issues and testing customer configurations in a lab environment
Author technical knowledgebase articles (FAQs) for use by customers, other technical support personnel, and partners based on closed issues
Develop training materials on your designated subject matter area of expertise
Review and provide feedback on Cavium technical documents, specifications, manuals, app notes, white papers, product briefs, etc
Networking protocols, software, systems, and equipment
C programming, troubleshooting, performance analysis in embedded systems environment
OS internals, binutils and C libraries in Linux, UNIX, xBSD, VxWorks, or similar operating system
GNU tool chain, gcc, gdb.
Device Driver/API development
U-boot bootloader porting
Common microprocessor architectures and assembly language programming
Writing app notes, technical papers, technical specifications
Network security (IPSec/SSL) and/or Layer 2-7 applications
PCB / Board design and bring-up practices
Circuit design and schematic capture / layout principles
Debugging and measurement tools such as EJTAG debugger tools, oscilloscopes, logic analyzers, and other test equipment.
High speed communications protocols and interfaces such as XAUI, SGMII, PCI-X, PCI-Express, Serial RapidIO, SPI4.2, Interlaken, DDR2/DDR3 SDRAM, etc
Datasheets and electrical / mechanical parameters
Willingness to collaborate with global team members in various time zones
Organized, Self-driven and Customer focused
Excellent oral and written English communication skills.
BS in Computer Science or Computer/Electrical Engineering with 7+ years of work experience in the field of 32b and 64b microprocessors & integrated SoCs (Preferably MIPS, ARM, or PowerPC). Previous experience in either a technical support engineering or FAE role is desired.
Cavium (NASDAQ: CAVM) is a provider of highly integrated semiconductor processors that enable intelligent networking, communications, storage, video and security applications.